The overall skeleton of a computer

In 1945, mathematician John von Neumann proposed a computer architecture blueprint that still influences us today.

The core concept of this blueprint is extremely simple, yet it laid the foundation for all general-purpose computers over the past eighty years.

Life analogy: an automated sorting system in a library

Imagine you walk into a large library and want to quickly find a book and mail it to a friend far away.

You need to go through the following steps:

Step 1: Input Requirements—You enter the book title at the library's computer terminal.

Step 2: Find Location—The system queries the database by the title and finds which shelf the book is on.

Step 3: Retrieve Book—A robotic arm takes the book down from the shelf.

Step 4: Package and Output—The book is wrapped, a shipping label is attached, and it is sent to the post office.

Step 5: Coordinate and Direct—All of this requires a central dispatch system to coordinate the order and rhythm.

If we translate this system into computer terms, it corresponds to the five major components of the von Neumann architecture:

library analogy	computer components	What it does
Query terminal	Input Device	Send external information into the computer
books on the shelf	Memory	A warehouse for storing programs and data
Robotic arm	Arithmetic Logic Unit (ALU)	Perform arithmetic and logical operations
Package delivery	Output device (Output)	Send the result out of the computer
Central Dispatch System	Control Unit	Direct each component to work in coordination

Have you noticed? The key to this library system working properly is not the individual components themselves, but the clear set of data-flow rules between them.

Similarly, the essence of the von Neumann architecture also lies inHow the components connect and communicate。

Core principle: the division of labor and collaboration of the five components

Overview of the Five Major Components

The von Neumann architecture divides a computer into five parts that are functionally independent yet closely cooperative:

Components	English	Simple understanding	Core functionality
Arithmetic unit	ALU (Arithmetic Logic Unit)	The computer's "abacus"	Performs arithmetic and logic operations such as addition, subtraction, multiplication, division, AND, OR, and NOT
Control unit	Control Unit	The computer's "command center"	Fetches instructions from memory, decodes instructions, and issues control signals to direct other components
Memory	Memory	The computer's "warehouse"	Stores program instructions and computational data, read and written by address
Input device	Input Devices	The computer's "eyes and ears"	Feeds external information (keystrokes, mouse clicks, sensor data) into the computer
Output device	Output Devices	The computer's "mouth and hands"	Send out the calculation results in a form humans can perceive (display, print, sound)

The ALU and the control unit together are what we commonly call the CPU (Central Processing Unit). They are the computer's "brain," while memory and input/output devices are the "nervous system" and "senses."

The architecture diagram below uses five colored rectangles to represent the five major components, with arrowed lines marking the direction of data flow.

Data bus Address bus Control bus Data writing

The figure below shows the most classic von Neumann architecture of modern computers. The entire system consists of five parts: CPU, Memory, Input, Output, and I/O interfaces. Inside the CPU, it contains the Control Unit, ALU, and Registers.

The CPU communicates with memory and I/O devices through the Data Bus, Address Bus, and Control Bus: the Address Bus specifies the access location, the Data Bus transmits instructions and data, and the Control Bus sends control signals such as read, write, and interrupt. Together, the three complete the information exchange inside the computer.

Three buses: the data highway

The connections between the five components are not disorderly; instead, information is transmitted in an orderly manner through three groups of "buses":

Bus type	English	What is transmitted	direction
Data bus	Data Bus	Actual instructions or operational data	Bidirectional (CPU can read and write)
Address bus	Address Bus	The memory address the CPU wants to access	Unidirectional (the CPU outputs the address to memory)
Control bus	Control Bus	Read/write enable, interrupt and other control signals	Issued by the controller, directing each component

Understanding the differences between these three buses is the key to understanding computer internal communication. Remember it this way: the Address Bus tells "where to go," the Data Bus is responsible for "carrying things," and the Control Bus decides "what action to perform."

The "Stored Program" concept: the soul of the von Neumann architecture

The division into five components is only the external skeleton. The truly revolutionary aspect of the von Neumann architecture lies inStored-ProgramConcept.

Before von Neumann, to execute a task on a computer, you had to manually plug and unplug cables, set switches, and even replace circuit boards.

To change tasks, you had to readjust the physical connections of the hardware—this is like having to reassemble the stove every time before cooking.

Von Neumann's breakthrough:

Program as data—Write the computation steps as an instruction sequence and place them in the same memory as the data.
Software-modifiable—Modifying a program only requires modifying the instruction content in memory, with no need to change the hardware.
Automatic execution—The CPU automatically and sequentially fetches instructions from memory, executes them, and then fetches the next one.

This idea means that the computer changes from a "dedicated computing tool" into a「General Computing Platform」。

Interactive demo: hover to explore the five components (example)

Hover your mouse over any component in the architecture diagram below, and the corresponding detailed description card on the right will highlight.Click the "Run Demo" button, and observe a small dot moving along the data-flow arrows—simulating the complete path of data flowing from an input device into memory, entering the CPU for computation, returning to memory, and finally being sent to an output device.

CPU block (ALU + Control Unit)

CPU (ALU + Control Unit)

ALU (Arithmetic Logic Unit) Control unit

memory block

Memory Memory (example demo)

Input device box

Input device

Output device box

Output device

Animated dot

Detailed description card

CPU Arithmetic Logic Unit + Control Unit
The Computer's 「Brain」

Memory Store instructions and data
Read/write by address

Input device Keyboard / Mouse
Data enters the computer

Output device Monitor / Printer
Results sent out of the computer

Click the button to observe the data flow path among the five major components.

Interactive demo: simulating a minimal stored-program computer

The Python code below simulates a minimal von Neumann computer—with an ALU (for addition), memory (storing instructions and data), a control unit (fetching and executing instructions sequentially according to the PC pointer), and input/output.

Please read the comments carefully, then run it.

Example

"""
Minimalist von Neumann computer simulator (example demo)
Demonstrate the collaborative work of the five major components: arithmetic unit, controller, memory, input, output
"""
class VonNeumannMachine:
"""A condensed version of the von Neumann architecture computer"""

def __init__(self):
# --- Memory ---
# A one-dimensional array starting at address 0, holding both instructions and data
self.memory = [0] * 256

# --- Arithmetic Logic Unit (ALU) + Register File ---
self.accumulator = 0 # Accumulator ACC, the core register of the ALU
self.temp = 0 # Temporary register to temporarily store operands

# --- Controller (Control Unit) ---
self.pc = 0 # Program counter PC, stores the address of the next instruction.
self.running = True # Run flag

# --- Input / Output ---
# Simulate data sent by input device
self.input_buffer = []
# Simulate data displayed by output device
self.output_buffer = []

# ============================================================
# Input device: writes external data to the specified memory address
# ============================================================
def input_to_memory(self, address, value):
print(f[Input Device] Write data to memory address {address}: {value})
self.memory[address] = value

# ============================================================
# Output device: reads and displays data from specified memory address
# ============================================================
def output_from_memory(self, address):
val = self.memory[address]
print(f[Output device] Read data from memory address {address}: {val})
self.output_buffer.append(val)

# ============================================================
# Memory: read / write operations (CPU accesses via bus)
# ============================================================
def mem_read(self, address):
Read memory content from specified address
if 0 <= address < len(self.memory):
return self.memory[address]
raise ValueError(f"Illegal memory address: {address}")

def mem_write(self, address, value):
"""Write the value to memory at the specified address"""
if 0 <= address < len(self.memory):
self.memory[address] = value
else:
raise ValueError(f"Illegal memory address: {address}")

# ============================================================
# ALU: performs arithmetic operations
# ============================================================
def alu_add(self, operand):
ALU addition operation: ACC = ACC + operand
old_acc = self.accumulator
self.accumulator += operand
print(f"[ALU (Arithmetic Logic Unit)] addition: {old_acc} + {operand} = {self.accumulator}")

def alu_load(self, operand):
"""ALU load operation: load immediate value into ACC"""
self.accumulator = operand
print(f[ALU Unit] Load: ACC = {operand})

# ============================================================
# Controller: fetches instructions, decodes, dispatches, updates PC
# ============================================================
def fetch(self):
"""Instruction fetch stage: fetch the next instruction from memory according to PC"""
instruction = self.mem_read(self.pc)
print(f"\n<<<SEP>>> [Controller FETCH] PC={self.pc}, fetched instruction code: {instruction})
self.pc += 1 # After the fetch, PC automatically increments by 1 to point to the next instruction
return instruction

def decode_and_execute(self, instruction):
"""
Decode + Execute stage:
We define a minimal instruction set (opcode + operand mixed encoding):
1 LOAD immediate — Load the value of the next memory unit into ACC
2 ADD address — Add the value at the specified address to ACC
3 STORE address — Store the value of ACC to the specified address
255 HALT — Halt
"""
if instruction == 1: # LOAD
operand = self.mem_read(self.pc)
self.pc += 1
print(f[Controller DECODE] Instruction: LOAD, Operand: {operand})
self.alu_load(operand)

elif instruction == 2: # ADD
address = self.mem_read(self.pc)
self.pc += 1
operand = self.mem_read(address)
print(f[Controller DECODE] Instruction: ADD address[{address}] (value is {operand}))
self.alu_add(operand)

elif instruction == 3: # STORE
address = self.mem_read(self.pc)
self.pc += 1
print(f"[Control unit DECODE] Directive: STORE Address[{address}] (Value = {self.accumulator})")
self.mem_write(address, self.accumulator)

elif instruction == 255: # HALT
print(f"[Controller DECODE] Instruction: HALT (halt)")
self.running = False

else:
print(f[Controller] Unknown instruction: {instruction}, halt)
self.running = False

# ============================================================
# Run Complete Program
# ============================================================
def run(self):
Main loop: repeatedly fetch -> decode -> execute, until halt
print("=" * 55)
print("Minimal von Neumann computer startup")
print("=" * 55)
while self.running:
instr = self.fetch() # Fetch instruction
self.decode_and_execute(instr) # Decode + Execute
print("\n" + "=" * 55)
print("Program execution complete, computer halted")
print("=" * 55)

# ================================================================
# Example program: compute 10 + 20, and store the result in address 100
# ================================================================
machine = VonNeumannMachine()

# The program is written into memory (instructions and data are mixed together; this is the 'stored-program' concept)
# Address 0: LOAD 10 (Opcode 1, Operand 10)
# Address 2: ADD 100 (opcode 2, operand 100, meaning to fetch the addend from address 100)
# Address 4: STORE 200 (opcode 3, operand 200, indicating the result is stored to address 200)
# Address 6: HALT (opcode 255)
machine.memory[0] = 1
machine.memory[1] = 10 # LOAD operand: immediate value 10
machine.memory[2] = 2
machine.memory[3] = 100 # ADD operand: address 100 where the data is located
machine.memory[4] = 3
machine.memory[5] = 200 # STORE operand: address 200 where result is stored
machine.memory[6] = 255 # HALT

# Store the addend 20 at address 100 (simulating the input device writing data)
machine.input_to_memory(100, 20)

# Run program
machine.run()

# View results
result = machine.mem_read(200)
print(f"\nFinal result: value at memory address 200 = {result})
machine.output_from_memory(200)
print(f"Output device buffer: {machine.output_buffer}")

Run this program, and you will see instructions being fetched, decoded, and executed one by one. This is what happens hundreds of millions of times every second in your computer—only the real CPU's instruction set is far more complex than this.

Summary and verification

One-sentence summary

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self-test questions

Question 1Among the five major components of the von Neumann architecture, which two are collectively called the CPU?

A. Arithmetic unit and memory
B. Arithmetic unit and control unit
C. Control unit and memory
D. Input devices and output devices

Correct answer: B

Question 2What is the function of the Address Bus? What is the direction of its data transmission?

A. Transmit computation results; bidirectional
B. Transmit control signals; issued by the control unit
C. Transmit memory addresses; from CPU to memory (unidirectional)
D. Transmit instructions and data; bidirectional

Correct answer: C. The address bus outputs address information from the CPU to the memory and is unidirectional.

Question 3What is the core significance of the "stored program" concept?

A. From then on, computers no longer needed an arithmetic unit
B. Modifying software only requires modifying memory content, with no need to change hardware
C. Memory capacity is larger than the CPU
D. Input devices and output devices can be merged

Correct answer: B. The stored program makes the computer from a dedicated device into a general-purpose platform, and software can be flexibly replaced.

other extensions